DMX Frame

DMX512 slots are transmitted sequentially in asynchronous serial format at a baud rate of 250kbps, using the DMX physical layer.

The content of a frame comprises a set of serial bytes (slots) sent with eight bits of data, one start bit, two stop bits. The frame starts with slot 0 and ending with the last implemented slot, with a maximum total of 513 slots.

Frame Synchronisation

A break character is used in DMX to signal the start of a frame. A break in asynchronous communications is defined to be any period that exceeds the duration of a single character.

Break signal at a data rate of 250 k baud.

In DMX, the break (at the sender) is longer than the minimum, with a duration of 92 µS of continuous low signal. This is followed by a 12 µS high level (Mark After Break) The next low transition indicates the control slot (start code). This longer duration provides more reliable detection of the start of a frame.

At the receiver, the start of a DMX packet is indicated by a break of 88µS, or greater, followed by a Mark After Break, MAB, of 8uS or greater. This break is used by the receiver to start reception of the DMX slots. The MTBF, Mark Time Between Frames can be up to 1 second. The MTBF is set high.

Frame Composition

The start of each DMX frame is prefixed by a "break" signal that provides the first part of the synchronisation sequence that indicates the start of a multiplexing frame. This is followed by a Mark After Break (MAB). The MAB helps to ensure the Break is an actual start sequence, and also provides sufficient time for even slow receivers to reset after the previous frame and then reliably process the first slot.

Note: A transmitter must always be set to produce a Break of at least 92 microseconds. The 1986 version of the Standard specified a 4 microsecond MAB period. The 1990 version of the standard changed that value to 8 microseconds.

The first slot (0) within the frame carries the START Code. This defines the format of the information in the subsequent slots in the frame. The interoperability of equipment complying with the Standard is largely due to support of the NULL START Code, which provides the most basic functions and must be implemented by all receivers. A receiver that does not know how to interpret an Alternate START Code (e.g. non-zero) must discard the entire contents of the frame. Alternate START Codes are reserved for special purposes or for future development of the Standard.

For each data slot, the receiver must also check the first stop bit and should check the second stop bit of all received slots to determine if they have the correct value. If a missing stop bit is detected, the receiver needs to discard the improperly framed slot data and all following slots in the frame.

The frame composition of a n-byte DMX Frame may be summarised as:

  1. Break
  2. Mark After Break (MAB)
  3. Start Code
    1. Start bit
    2. Start Code (8-bit Value)
    3. STOP Bit
    4. Stop bit
  4. Mark time before 1st data slot
  5. For count := 1 to n ( Max. n of 512)
    1. Start bit
    2. 8-bit Slot Value
    3. Stop Bit
    4. Stop bit
    5. Mark time between slots

The total frame-to-frame period must be in the range 1240 microseconds to 1 Second.

NOTE: In DMX the slots are identified by their position in the frame, the sender does not need to send the channel number at all.

Example Signal from a DMX bus

The figure below shows the signal at pin 3 and the blue trace shows the signal at pin 2. This illustrates the different voltages on a differential bus.

DMX Start of Frame (Signal for Data+/A is shown in green, and signal for Data-/B is shown in blue, the two levels have been shifted on the display so that they do not overlap).

The figure shows the main aspects of a DMX Frame. The MTBF (Mark Time Between Frames) for the controller was set the MTBF to 2mS. Following this there is a break of 88uS and a MAB, mark after break. The first slot has a start code of 0, which tells a DMX receiver to expect DMX data. The signal then floats high as the controller gets ready to send the next slot during the MTBS (Mark Time Between Slots). The controller then pulls the signal to ground to transmits the first slot. The slot consists of a start bit (B) and two stop bits (B2 and B3). These mark the start of the packet and the end of the slot. This slot caries the value of 255 in hexadecimal (0xFF).

Example DMX Frame Calculations

Calculation of the minimum DMX Slot size
Each slot is formed of one 8-bit character/byte, sent with 1 start bit, 8 data bits and 2 stop bits. The transmission rate is 250 kbaud, which means each baud corresponds to 4 µS, and one entire slot is 44 µS. A sender can pause between the stop bit of one slot and next start of the next slot.

Calculation of the maximum DMX Frame Rate
This calculates the maximum frame rate for full-sized DMX Frames,The total frame duration = Mark+Mark_after_break+slot_size*(n+1)

The Mark After Break ≥ 12 µS, Frame Size (n+1) = 513 bytes (including the start code).

The total frame duration == 92 + 12 + (44 * 513) µS
= 22676 µS (for a full sized frame)

Maximum frame rate = 10^6/22676 = 44 frames /sec


The DMX specification may be logically divided into a physical and a link layer:

See also:


Prof. Gorry Fairhurst, School of Engineering, University of Aberdeen, Scotland. (2014)